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FeRAM Cell Tester
 Features
The FeRAM Cell Tester controls the BL, WL, PL of a full memory cell to
record the hysteresis loop of a fully integrated memory cell. The FeRAM Cell Tester
generates the required timing.
If the chip offers a layout change, the automatic acquisition of the
material properties on a larger array can be done. In this case the FeRAM Cell Tester
operates in conjuntion with a switch box system and a probing station. The software
of the FeRAM Cell Tester automatically adjusts parameter sets such as those for
in-situ compensation etc.
Statistical evaluation is offered by the aixPlorer. E.g. the memory window
of a single bit as well as the memroy window distribution on a die or wafer can
be derived. But any acquired parameter can be investigated with respect to statistics.
The major benefit of the FeRAM Cell Tester is the important information
for process optimization which improves yield, lowers costs and reduces time to market.
The correlation of results of the digital and the
analog tests offers essential new knowledge.
Specifications
The FeRAM Cell Tester comprises all functionality of high resolution
measurements and speed down to the microsecond region.
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Thin Film & Memory Products